Regviz

NXP Semiconductors /LPC11E6x /SCT0 /LIMIT

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LIMIT

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC11E6x/SCT0/LIMIT#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LIMMSK_L0RESERVED0LIMMSK_H0RESERVED

Description

SCT limit register

Fields

LIMMSK_L

If bit n is one, event n is used as a counter limit for the L or unified counter (event 0 = bit 0, event 1 = bit 1, event 5 = bit 5).
RESERVED

Reserved.
LIMMSK_H

If bit n is one, event n is used as a counter limit for the H counter (event 0 = bit 16, event 1 = bit 17, event 5 = bit 21).
RESERVED

Reserved.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data